The J-K flip-flop is the most versatile of the basic flip-flops. It has the input- following character of the clocked D flip-flop but has two inputs,traditionally labeled J and K. If J and K are different then the output Q takes the value of J at the next clock edge.

A simplified version of the versatile J-K flip-flop. Note that the outputs feed back to the enabling NAND gates. This is what gives the toggling action when J=K=1.

The positive going transition (PGT) of the clock enables the switching of the output Q. The "enable" condition does not persist through the entire positive phase of the clock. The J & K inputs alone cannot cause a transition, but their values at the time of the PGT determine the output according to the truth table. This is an application of the versatile J-K flip-flop.

In synchronous data transfer between two J-K flip-flops, a transfer signal on the clock input causes transfer from cell A to cell B. The transfer signal could be applied to several such cells in series to create a shift register.

In asynchronous data transfer, a transfer pulse may be applied at any time to force the data onto the asychronous set and clear inputs, storing the data regardless of what is happening on the other inputs.